AYN

Master's Internship Project: Information-aware signal processing for software-defined EIS

NXP Semiconductors · Eindhoven, Netherlands

This proposal investigates how EIS data can be processed and selectively retained to maximize useful information while minimizing data storage and computational effort. Rather than storing all raw samples or treating every sample equally, the student will explore information-aware selection, weighting, and compact signal representations before or alongside the DFT. The goal is to develop a flexible software-defined EIS architecture in which data acquisition, DFT updating, and information extraction are decoupled, enabling approaches such as sliding DFTs, selective sample processing, and additional low-cost statistics or bounds. The different approaches can be evaluated in terms of estimation accuracy, robustness, information preservation, memory requirements, and computational complexity.

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