Vice President, Solutions R&D and PLM
Lattice Semiconductor · San Jose, California, United States
Lattice OverviewThere is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.
Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.
Job Description:
As the Vice President for Solutions R&D and PLM, you own the end-to-end technical execution of the Solutions Business Unit. You lead a global multi-site R&D organization spanning Solutions Product Management and Product Lifecycle Management, Solutions Architecture and Exploration, Solutions Development, Solutions Qualification and Hardening, Board Development, and Solutions Enablement plus L1 through L3 customer support. You are the senior technical leader responsible for turning strategy into product, and product into revenue.
This role is a rare opportunity to shape a business unit that is being built from the ground up on top of a public semiconductor company's platform foundation. You will define the operating model, hire and mentor senior leaders at each site, and set the standards for architecture, execution, quality, and customer engagement across every Solutions BU program.
Key Responsibilities
Product Management and Product Lifecycle Management
- Own Solutions Product Lifecycle Management across the four pillars including Cortex Product Line Management, Solutions Product Line Management, and ODM and OEM architecture upkeep.
- Own Cortex AI, AMILIA and AMITA, and Maple and Keystone silicon plus firmware roadmaps as they map to Solutions BU pillars.
- Drive Market Requirements Documents, Product Requirements Documents, and Total Cost of Ownership modeling.
- Own bundling, pricing input, and Solutions BU staging demonstrations at Open Compute Project Global, OCP EMEA, and customer offsites.
Solutions Architecture and Exploration Interface
- Interface with Solutions Architecture including customer evangelization, technical exploration with hyperscalers, ODMs, and OEMs, and technology staging for breakthrough innovation projects.
- Own AI explorations across the four pillars and evaluate emerging standards (Data Center Modular Hardware Specification, Data Center Secure Control Module, Redfish, Platform Level Data Model, Security Protocol and Data Model).
Solutions Development
- Own Solutions Development delivery across data center and security solutions, including Streaming Boot, PQC retrofit, plug-and-play, rack leak detection, and adjacent programs.
- Establish and maintain execution and schedule fidelity from engineering commit through general availability.
Solutions Quality Assurance and Hardening
- Own Solutions Qualification and Hardening across white box, black box, and system-level qualification.
- Establish qualification standards, laboratory infrastructure, and continuous improvement processes including root cause analysis and eight-discipline (8D) reports for major incidents.
Board Development
- Own Board Development including hardware design, layout, signal integrity, power integrity, and manufacturing enablement for Solutions BU physical products (M.2 daughter cards, DC-SCM cards, leak detection boards, reference platforms).
Solutions Enablement and Support
- Own Solutions Enablement including L1 through L3 customer support, developer collateral, reference designs, evaluation kits, and technical enablement content.
Team Leadership and Site Locality
- Lead a global multi-site R&D organization across LSV (San Jose), LPG (Penang), LPQ (Pune), and LSH (Shanghai).
- Hire, mentor, and promote senior technical leaders at each site.
- Establish and maintain trust with the Penang, Pune, and Shanghai teams; direct working relationships across time zones are essential.
Executive Partnership
- Partner with the SVP R&D and GM Solutions BU, the Head of Applications Engineering and Soft IP, the AMI leadership, the FPGA BU leadership, Central Engineering, and Corporate functions including Sales, Marketing, Finance, HR, and Legal.
- Represent Solutions BU R&D at Executive Leadership Team and Board discussions.
- Own the Solutions BU R&D operating budget and capital expenditure in coordination with Finance, Sr. Director of Engineering Operations and the SVP R&D.
Pay & Benefits
Consistent with Lattice Semiconductor values and applicable law, we provide the following information to promote pay transparency and equity. We have a market-based pay structure which varies by location. Please note that the base pay range is a guideline, and our compensation range reflects the cost of labor in the U.S. geographic market based on the location of the role. Pay within these ranges varies and depends on job-related knowledge, skills, and relevant work experience.
For candidates who receive and offer, the starting salary will vary based on various factors including, but not limited to, such qualifications as, skill level, competencies, and work location. The range provided may represent a candidate range and may not reflect the full range for an individual tenured employee.
Base Pay Range
340,000.00
In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!
Additional Information:
This position requires a successful background and reference checks and satisfactory proof of your right to work in the United States.
Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.
Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.
As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.