Senior Engineer – Silicon-to-System Power Delivery & Integrity
Huawei Technologies Italia · Vimodrone, Italy
About HuaweiHuawei is a leading global provider of information and communications technology (ICT) infrastructure and smart devices. With integrated solutions across four key domains – telecom networks, IT, smart devices, and cloud services – we are committed to bringing digital to every person, home and organization for a fully connected, intelligent world.
At Huawei, innovation focuses on customer needs. We invest heavily in basic research, concentrating on technological breakthroughs that drive the world forward. We have more than 200,000 employees, of which 55% are employed in R&D, and we operate in more than 170 countries and regions.
Huawei invests more than 20% of revenues in R&D every year: in the past 10 years our total R&D investments exceed 150B USD.
By the end of 2025, Huawei held +150.000 active patents.
Central Hardware Engineering Institute (CHEI) at Huawei Milan Research Center focuses on advanced hardware technologies for next-generation ICT systems, with strong emphasis on high-speed interconnects, power integrity (PI), signal integrity (SI), and system-level performance optimization. The team develops both engineering solutions and internal methodologies/tools to enable robust, scalable hardware design.
We are looking for a:
Senior Engineer – Silicon-to-System Power Delivery & Integrity
The opportunityYou will lead research and methodology development in power delivery and power integrity, focusing on the interactions between SoC silicon power characteristics and package to board power delivery architectures. This role centers on developing custom modeling methodologies, computational frameworks and cross-layer optimization strategies to address SoC power delivery challenges in next generation high performance computing platforms.
Key Responsibilities
· SoC Power Characterization: Research and analyze silicon power characteristics, dynamic current profiles and voltage droop budgets to define target impedance and guide board level design.
· Die to System PDN Modeling: Develop and apply advanced PDN/PI modeling methodologies that incorporate silicon power delivery characteristics and transient load behavior to evaluate voltage regulation, die-package-board resonances and opportunities for system-level architectural improvements.
· SoC Workload-Driven Optimization: Define and optimize board-level PDN architectures, decoupling strategies, and VRM design based on SoC workload characteristics, balancing PI performance, design margins, PCB area, and cost.
· Chip to system framework & research: Develop and validate computational frameworks integrating SoC load behavior with system level PDN models, and investigate emerging power delivery technologies to identify feasible research directions and architectural improvement
Required Qualifications
- M.S. with 6+ years’ industry experience or Ph.D. with 3+ years’ industry experience in Electrical Engineering, (or a related field) with background on system-level PI/PDN design.
- Strong understanding of Silicon to system power architecture, including SoC power characteristics, transient current behavior, voltage drop constraints and their impact on package and board level PDN design.
- Experience developing PI methodologies, PDN models, transient analysis workflows and lab correlation.
- Proficiency with industry-standard simulation tools and scripting languages for custom modeling and design automation
Nice to have
- Experience with AI, HPC or datacenter platforms involving high power density and large transient current demands.
- Familiarity with SoC power management techniques, including dynamic voltage and frequency scaling.
- Knowledge of integrated voltage regulators architectures (IVRs), high frequency VRMs, advance power delivery architectures and high bandwidth power delivery control loops.
- Experience developing or validating chip/package/board electrical models and applying computational methods to automate system-level PI.
While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of our essential criteria, we encourage you to submit an application and showcase how your background makes you a strong candidate.
What We Offer
We offer you an exciting professional career in one of the leading and fastest growing multinational telecommunication companies, challenging work and a competitive salary package. Personal development is ensured through many training opportunities in Western Europe and abroad.
We offer a gross annual salary typically ranging from €65,000 to €80,000 determined according to objective criteria such as professional experience, competencies, and seniority. Employees may also be considered for a discretionary annual bonus ranging from 0 to 2 monthly salaries, subject to company evaluation. The applicable collective bargaining agreement is the CCNL Telecommunications, within levels 6° and 7°.
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Huawei is an Equal Opportunity Employer and do not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, genetic information, or any other legally protected status. All qualified applicants will receive consideration for employment without regard to these characteristics. We are committed to creating an inclusive and diverse workplace
Company Info
Huawei Technologies Italia S.r.l.
Registered Office: Via Lorenteggio 240, Tower A, Milan
R&D Office address: Viale Martesana 12, 20055 Vimodrone (MI)